Keynote Speaker: Sridhar Seshadri, Senior Vice President, Hardware-Assisted Verification, Synopsys
Title: Trust at Scale with Hardware‑Assisted Verification: Rethinking Custom Computing Machines
Abstract: Speed is no longer the hardest part of building modern systems – getting the chip right is. As chips and the software that drives them grow into tens of billion‑gates, heterogeneous, multi‑clock systems, the dominant cost becomes proving end‑to‑end correctness, reproducing rare failures, and reaching root cause fast enough to keep innovation moving. This keynote argues that Hardware‑Assisted Verification (HAV) is evolving from a “faster simulation” technique into the centerpiece of how we deliver trusted systems at scale.
We reframe Field‑Programmable Custom Computing Machines as system‑scale execution substrates that accelerate insight – not just cycles, and spotlight the research agenda needed to make that shift real: system‑scale partitioning & communication‑aware mapping, incremental compilation for rapid iteration, programmable observability under trace limits (“observability bandwidth”), deterministic failure replay to shrink Time‑to‑First‑Insight, hybrid accuracy models that mix cycle‑accurate and higher‑level bridges, and runtime systems for always‑on verification and CI‑style scheduling, checkpointing, and resilience.
We also broaden security from “accelerate crypto” to “accelerate assurance,” highlighting secure reconfiguration, auditability, and evidence generation as continuous system properties. The talk closes with a call to the FCCM research community to define benchmarks and evaluation metrics beyond throughput – so we can optimize for confidence per hour and build custom machines that are not only fast, but demonstrably ready, resilient, and trustworthy.
Sridhar Seshadri is Senior Vice President for HAV at Synopsys. He is an Electronic Design Automation (EDA) veteran specializing in Functional Verification with 30+ years of experience. He lead product teams in Verification like VCS, Spyglass, Formal and Hardware – ZeBu and HAPs. Sridhar has impacted Verification industry by enabling SystemVerilog, VMM/UVM, Low Poer, Unified Compile, Unified Debug across Synopsys Verification products. Sridhar has built teams with a winning culture, business growth focus, building and enabling talented leaders and teams, defining product vision with establishing operating model and execution excellence and finally delivering disruptive products in marketplace. He is responsible for ZeBu emulation and HAPS prototyping products and a large global organization. He grew a multi-hundred-million-dollar business by multi-x in last few years while maintaining a strong market leadership.