FCCM 2001

The 9th IEEE International Symposium on
Field-Programmable Custom Computing Machines

April 29 - May 2, 2001

Technical Programme : Papers

Monday, April 30, 2001
Paper Session 1 : DSP
Parallelization of MATLAB Applications for a multi-FPGA System
A. Nayak et. al.
Automatic Mapping of Multiple Applications to Multiple Adaptive Computing Systems
S-W. Ong, et. al.
Parameterized Module Generator for an FPGA-Based Electronic Cochlea
M.P. Leong, C.T. Jin and P.H.W. Leong
Poster Session 1
Paper Session 2 : Tools
Novel Algorithm Combining Temporal Partitioning and Sharing of Functional Units
J. Cardoso
Instrumenting Bitstreams for Debugging FPGA Circuits
P. Graham, B. Nelson and B. Hutchings
Paper Session 3 : Arithmetic
The Multiple Wordlength Paradigm
G. Constantinides, P.Y.K. Cheung, W. Luk
FPGA Implementation of Pipelined On-line Scheme for 3-D Vector Normalization
Z. Huang and M. Ercegovac
A Reconfigurable Co processor for Variable Long Precision Arithmetic Using Indian Algorithms
R. Parthasarathy et. al.
Poster Session 2
Paper Session 4 : JBits
An efficient content-addressable memory implementation using
Philip B James-Roxby
Lava and JBits: From HDL to Bitstream in Seconds
S. Singh and P. James-Roxby
Tuesday, May 1, 2001
Paper Session 5 : Architecture I

Poster Session 3
Paper Session 6 : Tools for Run Time Reconfiguration
Architecture and Application of PLATO, A Reconfigurable Active Network Platform
A. Dollas et. al.
Totem: Custom Reconfigurable Array Generation
K. Compton and S. Hauck
A Cellular Automata System with FPGA
T. Kobori et. al.
Paper Session 7 : Fault Tolerance
A Fault-Tolerance Scheme for a MIN-based Multi-Sensor System
M. Alderighi et. al.
Column-Based Precompiled Configuration Techniques for FPGA Fault Tolerance
W-J. Huang and E. McCluskey
Poster Session 4
Paper Session 8 : Applications I
Acceleration of a 2D-FFT on an Adaptable Computing Cluster
K. Underwood, R. Sass and W. Ligon
Design and Implementation of a Generic 2-D Biorthogonal Discrete Wavelet Transform on an FPGA
A. Benkrid, D. Crookes, K. Benkrid
Wednesday, May 2, 2001
Paper Session 9 : Image Processing
An Application-Specific Compiler for High-Speed Binary Image Morphology
S. Hemmert and B. Hutchings
One-step compilation of image processing applications to FPGAs
W. Bohm et. al.
High Level Programming for FPGA Based Image and Video Processing using Hardware Skeletons
K. Benkrid
Poster Session 3
Paper Session 10 : Applications II
Fast Regular Expression Matching using FPGAs
R. Sidhu and V. Prasanna
A Configurable Hardware/Software Approach to SAT Solving
J. de Sousa, J. da Silva, and M. Abramovici