The 11th Annual IEEE Symposium on
Field-Programmable Custom Computing Machines
FCCM '03
Napa, California
8 - 11 April, 2003

Preliminary Program

Tuesday 8 April 2003

7:00pm - 9:00pm
Registration and Reception

Wednesday 9 April 2003

8:30am - 10:00am
Session 1: Applications I

Authors:      S. Young, P. Alfke, C. Fewer, S. McMillan, B. Blodget, D. Levi
Organization: Xilinx, Inc.
Title:        A High I/O Reconfigurable Crossbar Switch

Authors:      H.A. Wake and D.A. Buell
Organization: University of South Carolina
Title:        Congruential sieves on a reconfigurable computer

Authors:      A. Dollas, C. Kachris, N. Bourbakis
Organization: Technical University of Crete and Wright State University
Title:        Performance Analysis of Fixed, Reconfigurable, and Custom Architectures for the SCAN Image and Video Encryption Algorithm

11:00am - 12:00pm
Session 2: Network Security

Authors:      J. Moscola, J. Lockwood, R. Loui, M. Pachos
Organization: Washington University, St. Louis
Title:        Implementation of a Content-Scanning Module for an Internet Firewall

Authors:      T.K. Lee, S. Yusuf, W. Luk, M. Sloman, E. Lupu and N. Dulay
Organization: Imperial College
Title:        Compiling Policy Descriptions into Reconfigurable Firewall Processors

1:30pm - 3:00pm
Session 3: Communication Techniques

Authors:      K.H. Tsoi, K.H. Leung, P.H.W. Leong
Organization: Chinese University of Hong Kong
Title:        Compact FPGA-based True and Pseudo Random Number Generators

Authors:      V. Singh, A. Root, E. Hemphill, N. Shirazi and J. Hwang
Organization: Xilinx
Title:        Accelerating Bit Error Rate Testing Using a System Level Design Tool

Authors:      D-U. Lee, W. Luk, J. Villasenor, P.Y.K. Cheung
Organization: Imperial College and UCLA
Title:        A Hardware Gaussian Noise Generator for Channel Code Evaluation

4:00pm - 5:00pm
Session 4: Arithmetic I

Authors:      G. Constantinides
Organization: Imperial College
Title:        Perturbation Analysis for Word-length Optimization

Authors:      B.R. Lee and N. Burgess
Organization: Cardiff University
Title:        Improved Small Multiplier Based Multiplication, Squaring and Division

7:00pm - 10:00pm
Demo night

Thursday 10 April 2003

8:30am - 10:00am
Session 5: Device Architecture

Authors:      B. Levine, H. Schmit
Organization: Carnegie Mellon University
Title:        Efficient Application Representation for HASTE: Hybrid Architectures with a Single Executable

Authors:      K. Eguro, S. Hauck
Organization: University of Washington
Title:        Issues and Approaches to Coarse-Grain Reconfigurable Architecture Development

Authors:      H. Kagotani, H. Schmit
Organization: Carnegie Mellon University
Title:        Asynchronous PipeRench: Architecture and Performance Estimations

11:00am - 12:00pm
Session 6: Fault modeling and recovery

Authors:      M. Wirthlin, D. Johnson, N. Rollins, M. Caffrey, P. Graham
Organization: Brigham Young University and Los Alamos National Lab
Title:        The Reliability of FPGA Circuit Designs in the Presence of Radiation Induced Configuration Upsets

Authors:      W. Xu, R. Ramanarayanan, R. Tessier
Organization: University of Massachusetts
Title:        Adaptive Fault Recovery for Networked Reconfigurable Systems

1:30pm - 3:00pm
Session 7: Applications II

Authors:      J. Frigo, D. Palmer, M. Gokhale and M. Popkin-Paine
Organization: Los Alamos National Laboratory
Title:        Gamma-Ray Pulsar Detection using Reconfigurable Computing Hardware

Authors:      A. Benkrid, K. Benkrid, D. Crookes
Organization: The Queen's University Of Belfast
Title:        Design and Implementation of a Generic 2-D orthogonal Discrete Wavelet Transform on FPGA

Authors:      H. Quinn
Organization: Northeastern University
Title:        Runtime Assignment of Reconfigurable Hardware Components for Image Processing Pipelines

4:00pm - 5:00pm
Session 8: Arithmetic II

Authors:      J. Liang, R. Tessier, O. Mencer
Organization: University of Massachusetts, Lucent Bell Labs
Title:        Floating Point Unit Generation and Evaluation for FPGAs

Authors:      X. Wang, B. Nelson
Organization: Brigham Young University
Title:        Tradeoffs of Designing Floating-Point Division and Square Root on Virtex FPGAs

Friday 11 April 2003

8:30am - 10:00am
Session 9: Compilation Techniques

Authors:      P. Diniz and J. Park
Organization: USC Information Sciences Institute
Title:        Data Search and Reorganization using FPGAs: Application to Spatial Pointer-based Data Structures

Authors:      P. Jackson, B. Hutchings
Organization: Brigham Young University
Title:        Simulation and Synthesis of CSP-based Interprocess Communication

Authors:      K.S. Hemmert, J. Tripp, B. Hutchings
Organization: Brigham Young University
Title:        Source Level Debugger for the Sea Cucumber Synthesizing Compiler

10:30am - 11:30am
Session 10: Programming Frameworks

Authors:      J. Ou, S. Choi, V. Prasanna
Organization: University of Southern California
Title:        Performance Modeling of Reconfigurable SoC Architectures and Energy-Efficient Mapping of a Class of Applications

Authors:      A. Slade, B. Nelson, B. Hutchings
Organization: Brigham Young University
Title:        Reconfigurable Computing Application Frameworks

FCCM / 23 March 2003 / fccm@fccm.org