| Monday, April 24, 2006 |
| Paper Session 1 : Supercomputer Applications
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A Hybrid Approach for Mapping Conjugate Gradient onto
an FPGA-Augmented Reconfigurable Supercomputer
Gerald Morris, Richard Anderson, Viktor Prasanna
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A Case Study in Porting a Production Scientific
Supercomputing Application to a Reconfigurable Computer
Volodymyr Kindratenko, David Pointer
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A Hardware/Software Approach to Molecular Dynamics on
Reconfigurable Computers
Ronald Scrofano, Maya Gokhale, Frans Trouw, Viktor Prasanna
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| Poster Session 1 |
| Paper Session 2 : Methodology and Tools
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Virtual Embedded Blocks: A Methodology for Evaluating
Embedded Elements in FPGAs
Chun Hok Ho, Philip Leong, Wayne Luk, Steve Wilton
and Sergio Lopez-Buedo
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Automated Generation of Hardware Accelerators with
Direct Memory Access from ANSI/ISO Standard C Functions
David Lau, Orion Pritchard and Philippe Molson
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| Paper Session 3 : Data Generation and Processing
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Efficient Hardware Generation of Random Variates with
Arbitrary Distributions
David B. Thomas and Wayne Luk
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An Architecture for Efficient Hardware Data Mining using
Reconfigurable Computing Systems
Zachary Baker and Viktor Prasanna
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Automatic Sliding Window Operation Optimization for FPGA-Based
Computing Boards
Haiqian Yu and Miriam Leeser
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| Poster Session 2 |
| Paper Session 4 : Hybrid Systems
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Enabling a Uniform Programming Model Across the Software/Hardware
Boundary
Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens,
Fabrice Baijot, Ed Komp and David Andrews
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A Type Architecture for Hybrid Micro-Parallel Computers
Benjamin Ylvisaker, Brian Van Essen and Carl Ebeling
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| Tuesday, April 25, 2006 |
| Paper Session 5 : Multi-Processor/Multi-Threaded Systems
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A Scalable FPGA-based Multiprocessor
Arun Patel, Manuel Saldaa, Christopher Comis, Paul Chow,
Christopher A. Madill and Rgis Poms
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A Reconfigurable Distributed Computing Fabric Exploiting
Multilevel Parallelism
Charles Cathey, Jason Bakos and Duncan Buell
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A Multithreaded Soft Processor for SoPC Area Reduction
Blair Fort, Davor Capalija, Zvonko G. Vranesic and Stephen D. Brown
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| Poster Session 3 |
| Paper Session 6 : Graph Algorithms
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GraphStep: A System Architecture for Sparse-Graph Algorithms
Michael deLorimier, Nachiket Kapre, Nikil Mehta, Dominic Rizzo,
Ian Eslick, Raphael Rubin, Tomas Uribe, Thomas Knight and Andre DeHon
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Hardware/Software Codesign for All-Pairs Shortest-Paths
on a Reconfigurable Supercomputer
Uday Bondhugula, Ananth Devulapalli, James Dinan, Joseph Fernando,
Pete Wyckoff, Eric Stahlberg and P. Sadayappan
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| Paper Session 7 : Power and Energy Optimization
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A Field Programmable RFID Tag and Associated Design Flow
Alex K. Jones, Raymond Hoare, Swapna R. Dontharaju, Shenchih Tung,
Ralph Sprang, Josh Fazekas, James T. Cain and Marlin H. Mickle
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Combining Instruction Coding and Scheduling to Optimize Energy
in System-on-FPGA
Robert Dimond, Oskar Mencer and Wayne Luk
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Power Visualization, Analysis, and Optimization Tools for FPGAs
Matthew French, Li Wang and Michael Wirthlin
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| Poster Session 4 |
| Paper Session 8 : Network Technology
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Systematic Characterization of Programmable Packet Processing Pipelines
Michael Attig and Gordon Brebner
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Packet-Switched vs. Time-Multiplexed FPGA Overlay Networks
Nachiket Kapre, Nikil Mehta, Michael deLorimier, Raphael Rubin,
Henry Barnor, Michael Wilson, Michael Wrighton and Andre DeHon
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| Wednesday, April 26, 2006 |
| Paper Session 9 : Biomedical and Cryptographic Applications
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Single Pass Approximate String Matching on FPGAs
Martin Herbordt, Tom VanCourt, Yongfeng Gu, Josh Model
and Bharat Sukhwani
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An FPGA Solution for Radiation Dose Calculation
Kevin Whitton, X. Sharon Hu and Cedric Yu
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A Parallel Hardware Architecture for fast Gaussian Elimination
over GF(2)
Andrey Bogdanov, Marius C. Mertens, Christof Paar, Jan Pelzl
and Andy Rupp
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| Poster Session 3 |
| Paper Session 10 : Arithmetic
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Advanced Components in the Variable Precision Floating-Point Library
Xiaojun Wang, Sherman Braganza and Miriam Leeser
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Pipelined Mixed Precision Algorithms on FPGAs for
Fast and Accurate PDE Solvers from Low Precision Components
Robert Strzodka and Dominik Gddeke
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