IEEE Symposium on Field-Programmable Custom Computing Machines

On-Orbit Flight Results from the Reconfigurable Cibola Flight Experiment Satellite (CFESat) [PDF]
Michael Caffrey, Michael Wirthlin, William Howes, Daniel Richins, Keith Morgan, Diane Roussel-Dupr, Scott Robinson, Anthony Nelson and Anthony Salazar
Los Alamos National Laboratory and Brigham Young University

Accelerating Cosmological Data Analysis with FPGAs [PDF]
Volodymyr Kindratenko and Robert Brunner
University of Illinois at Urbana-Champaign

FPGA Design Analysis of the Clustering Algorithm for the CERN Large Hadron Collider [PDF]
Anthony Gregerson, Amin Farmahini-Farahani, Ben Buchli, Steve Naumov, Michail Bachtis, Katherine Compton, Michael Schulte, Wesley Smith and Sridhara Dasu
University of Wisconsin, Madison

Accelerating Quadrature Methods for Option Valuation [PDF]
Anson H.T. Tse, David B. Thomas and Wayne Luk
Imperial College

Accelerating SPICE Model-Evaluation using FPGAs [PDF]
Nachiket Kapre and Andre DeHon
California Institute of Technology and University of Pennsylvania

FPGA Accelerated Simulation of Biologically Plausible Spiking Neural Networks [PDF]
David B. Thomas and Wayne Luk
Imperial College

Generic Software Framework for Adaptive Applications on FPGAs [PDF]
Suhaib A. Fahmy, J”rg Lotze, Juanjo Noguera, Robert Esser and Linda Doyle
Trinity College and Xilinx Research Labs

Block, Drop or Roll(back): Alternative Preemption Methods for RH Multi-Tasking [PDF]
Kyle Rupnow, Wenyin Fu and Katherine Compton
University of Wisconsin, Madison

Size-Reconfiguration Delay Trade-offs for a Class of DSP Blocks in Multi-mode Communication Systems [PDF]
Amir Hossein Gholamipour, Hamid Eslami, Ahmed Eltawil and Fadi Kurdahi
University of California, Irvine

CAAD BLASTP: NCBI BLASTP Accelerated with FPGA-Based Pre-Filtering [PDF]
Jin Park, Yunfei Qiu and Martin Herbordt
Boston University

RCBLASTn: Implementation and Evaluation of the BLASTn Scan Function [PDF]
Siddhartha Datta, Parag Beeraka and Ron Sass
University of North Carolina at Charlotte

Pipelined Multi-Core Architecture on FPGA for Large Dictionary String Matching [PDF]
Qingbo Wang and Viktor Prasanna
University of Southern California

Memory-Efficient Pipelined Architecture for Large-Scale String Matching [PDF]
Yi-Hua E. Yang and Viktor K. Prasanna
University of Southern California

A Massively Parallel FPGA-based Coprocessor for Support Vector Machines [PDF]
Srihari Cadambi, Igor Durdanovic, Venkata Jakkula, Murugan Sankaradass, Eric Cosatto, Srimat Chakradhar and Hans Peter Graf
NEC Laboratories

Application-Specific Customization and Scalability of Soft Multiprocessors [PDF]
Deepak Unnikrishnan, Jia Zhao and Russell Tessier
University of Massachusetts, Amherst

Benchmarking Reconfigurable Architectures in the Mobile Domain [PDF]
Peter Jamieson, Tobias Becker, Wayne Luk, Tero Rissa, Teemu Pitkanen and Peter Y.K. Cheung
Imperial College, Nokia, and Tampere University of Technology

Optical Flow on the Ambric Massively Parallel Processor Array (MPPA) [PDF]
Brad Hutchings, Brent Nelson, Stephen West, Reed Curtis
Brigham Young University

Real-Time Fisheye Lens Distortion Correction Using Automatically Generated Streaming Accelerators [PDF]
Nikolaos Bellas, Sek Chai, Malcolm Dwyer and Dan Linzmeier
University of Thessely and Motorola

FPGA-based Monte Carlo Computation of Light Absorption for Photodynamic Cancer Therapy [PDF]
Jason Luu, Keith Redmond, William Chun Yip Lo, Paul Chow, Lothar Lilge and Jonathan Rose
University of Toronto and Ontario Cancer Institute

Scalable High Throughput and Power Efficient IP-Lookup on FPGA [PDF]
Hoang Le and Viktor Prasanna
University of Southern California

Architectural Comparison of Instruments for Transaction Level Monitoring of FPGA-based Packet Processing Systems [PDF]
Paul McKechnie, Michaela Blott and Wim Vanderbauwhede
Xilinx and University of Glasgow

A Fine-grained Pipelined Implementation of the LINPACK Benchmark on FPGAs [PDF]
Guiming Wu, Yong Dou, Yuanwu Lei, Jie Zhou and Miao Wang
National University of Defense Technology, China

Compact and Flexible Microcoded Elliptic Curve Processor for Reconfigurable Devices [PDF]
Samuel Antao, Ricardo Chaves and Leonel Sousa
Instituto Superior Tecnico/INESC

Non-Preconditioned Conjugate Gradient on Cell and FPGA based Hybrid Supercomputer Nodes [PDF]
David DuBois, Andrew DuBois, Thomas Boorman and Carolyn Connor
Los Alamos National Laboratory

More Flops or More Precision? Accuracy Parameterizable Linear Equations Solvers for Model-Predictive Control [PDF]
Antonio Roldao-Lopes, Amir Shahzad, George Constantinides and Eric Kerrigan
Imperial College

Acceleration and Energy Efficiency of Geometric Algebra Computations using Reconfigurable Computers and GPUs [PDF]
Holger Lange, Florian Stock, Andreas Koch and Dietmar Hildenbrand

FPGA Implementation of a Single-Precision Floating-Point Multiply-Accumulator with Single-Cycle Accumulation [PDF]
Arun Paidimarri, Alessandro Cevrero, Philip Brisk and Paolo Ienne

FPGA Floating Point Datapath Compiler [PDF]
Martin Langhammer and Tom Vancourt

High-End Reconfigurable Systems for Fast Password Cracking [PDF]
Kostas Theoharoulis and Ioannis Papaefstathiou

Application Experiments: MPPA and FPGA [PDF]
Philip Top and Maya Gokhale

Efficient Mapping of Hardware Tasks on Reconfigurable Computers Using Libraries of Architecture Variants [PDF]
Miaoqing Huang, Vikram Narayana and Tarek El-Ghazawi

Exploiting Matrix Symmetry to Improve FPGA-Accelerated Conjugate Gradient [PDF]
Jason Bakos and Krishna Nagar

Employment of Reduced Precision Redundancy for Fault Tolerant FPGA Applications [PDF]
Margaret Sullivan, Herschel Loomis and Alan Ross

Accelerating the Gauss-Seidel Power Flow Solver on a High Performance Reconfigurable Computer [PDF]
Jong-Ho Byun, Arun Ravindran, Arindam Mukherjee, Bharat Joshi and David Chassin

FPGA Implemenations of the Interior-Point Algorithm for Linear Programming with Applications to Collision Detection [PDF]
Chih-Hung Wu, Seda Memik and Sanjay Mehrotra

Shared Memory Cache Organizations for Reconfigurable Computing Systems [PDF]
Philip Garcia and Katherine Compton

Minimizing Internal Fragmentation by Fine-grained Two-dimensional Module Placement for Runtime Reconfigurable Systems [PDF]
Dirk Koch, Christian Beckhoff and Juergen Teich

AIREN: A Novel Integration of On-Chip and Off-Chip FPGA Networks [PDF]
Andrew Schmidt, William Kritikos, Rahul Sharma and Ron Sass

Exploiting Partially Reconfigurable FPGAs for Situation-Based Reconfiguration in Wireless Sensor Networks [PDF]
Rafael Garcia, Ann Gordon-Ross and Alan George

A Packet Generator on the NetFPGA platform [PDF]
G. Adam Covington, Glen Gibb, John Lockwood and Nick McKeown

IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing [PDF]
Tobias Schumacher, Christian Plessl and Marco Platzner

Optimal Placement-aware Trace-based Scheduling of Hardware Reconfigurations for FPGA Accelerators [PDF]
Joon Edward Sim, Weng-Fai Wong and Juergen Teich

Context Sharing for Area Efficiency of Regular Expression Pattern Matching on FPGA
Yuan-Chin Wen, Henry Yu and Sheng-De Wang

FPGA Implementation and Customization of a 64-Bit BID-Based Decimal Floating-Point Adder
Amin Farmahini-Farahani, Charles Tsen and Katherine Compton

Performance Metrics for Hybrid Computation
Kyle Rupnow, Jacob Adriaens, Wenyin Fu and Katherine Compton

An FPGA-based Implementation of Velocity Interpolation for the Immersed Boundary Method
Dinel Shah, Gabor Ferencz, Eric Peskin and Charles Peskin

An Integer Linear Programming Model for Automated Matrix Operation Scheduling on FPGAs
Colin Yu Lin, Ngai Wong and Hayden Kwok-Hay So

Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX
Mariusz Grad and Christian Plessl

Evaluation of Static Analysis Techniques for Fixed-Point Precision Optimization [PDF]
Jason Cong, Karthik Gururaj, Bin Liu, Chunyue Liu, Zhiru Zhang, Sheng Zhou and Yi Zou

An FPGA Implementation for Solving Least Square Problem [PDF]
Depeng Yang, Gregory Peterson, Husheng Li and Junqing Sun

In-situ FPGA Debug Driven by On-Board Microcontroller [PDF]
Zachary Baker

A Parameterized Stereo Vision Core for FPGAs [PDF]
Stephen Longfield and Mark Chang

Evaluation of an FPGA-Based Filesystem
Ashwin Mendon, Andrew Schmidt and Ron Sass

An FPGA Implementation of 3-D FDTD Field Compute Engine
Robin Pottathuparambil, Ryan S. Adams and Ron Sass

Design Exploration for FPGA-based MPSoC: JPEG Encoding Case Study
Jason Wu, John Williams, Neil Bergmann and Peter Sutton

Real-time Landmine Detection Using FPGA-Based Hidden Markov Models
Aaron Curry, Steven Hannah and Christopher Doss