IEEE Symposium on Field-programmable Custom Computing Machines

April 24 - April 26, 2006
Napa Valley, California

Session 1: Supercomputer Applications

Title: A Hybrid Approach for Mapping Conjugate Gradient onto an FPGA-Augmented Reconfigurable Supercomputer
Authors: Gerald Morris, Richard Anderson, Viktor Prasanna
Organization: USC, Jackson State University

Title: A Case Study in Porting a Production Scientific Supercomputing Application to a Reconfigurable Computer
Authors: Volodymyr Kindratenko, David Pointer
Organization: UIUC

Title: A Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers
Authors: Ronald Scrofano, Maya Gokhale, Frans Trouw, Viktor Prasanna
Organization: USC/LANL

Session 2: Methodology and Tools

Title: Virtual Embedded Blocks: A Methodology for Evaluating Embedded Elements in FPGAs
Authors: Chun Hok Ho, Philip Leong, Wayne Luk, Steve Wilton and Sergio Lopez-Buedo
Organization: Imperial College, U. of British Columbia, U Autonoma de Selville

Title: Automated Generation of Hardware Accelerators with Direct Memory Access from ANSI/ISO Standard C Functions
Authors: David Lau, Orion Pritchard and Philippe Molson
Organization: Altera

Session 3: Data Generation and Processing

Title: Efficient Hardware Generation of Random Variates with Arbitrary Distributions
Authors: David B. Thomas and Wayne Luk
Organization: Imperial College

Title: An Architecture for Efficient Hardware Data Mining using Reconfigurable Computing Systems
Authors: Zachary Baker and Viktor Prasanna
Organization: USC

Title: Automatic Sliding Window Operation Optimization for FPGA-Based Computing Boards
Authors: Haiqian Yu and Miriam Leeser
Organization: Northeastern University

Session 4: Hybrid Systems

Title: Enabling a Uniform Programming Model Across the Software/Hardware Boundary
Authors: Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp and David Andrews
Organization: University of Kansas

Title: A Type Architecture for Hybrid Micro-Parallel Computers
Authors: Benjamin Ylvisaker, Brian Van Essen and Carl Ebeling
Organization: University of Washington

Session 5: Multi-Processor/Multi-Threaded Systems

Title: A Scalable FPGA-based Multiprocessor
Authors: Arun Patel, Manuel Saldaa, Christopher Comis, Paul Chow, Christopher A. Madill and Rgis Poms
Organization: University of Toronto

Title: A Reconfigurable Distributed Computing Fabric Exploiting Multilevel Parallelism
Authors: Charles Cathey, Jason Bakos and Duncan Buell
Organization: University of South Carolina

Title: A Multithreaded Soft Processor for SoPC Area Reduction
Authors: Blair Fort, Davor Capalija, Zvonko G. Vranesic and Stephen D. Brown
Organization: University of Toronto

Session 6: Graph Algorithms

Title: GraphStep: A System Architecture for Sparse-Graph Algorithms
Authors: Michael deLorimier, Nachiket Kapre, Nikil Mehta, Dominic Rizzo, Ian Eslick, Raphael Rubin, Tomas Uribe, Thomas Knight and Andre DeHon
Organization: Cal Tech

Title: Hardware/Software Codesign for All-Pairs Shortest-Paths on a Reconfigurable Supercomputer
Authors: Uday Bondhugula, Ananth Devulapalli, James Dinan, Joseph Fernando, Pete Wyckoff, Eric Stahlberg and P. Sadayappan
Organization: Ohio State University

Session 7: Power and Energy Optimization

Title: A Field Programmable RFID Tag and Associated Design Flow
Authors: Alex K. Jones, Raymond Hoare, Swapna R. Dontharaju, Shenchih Tung, Ralph Sprang, Josh Fazekas, James T. Cain and Marlin H. Mickle
Organization: University of Pittsburgh

Title: Combining Instruction Coding and Scheduling to Optimize Energy in System-on-FPGA
Authors: Robert Dimond, Oskar Mencer and Wayne Luk
Organization: Imperial College

Title: Power Visualization, Analysis, and Optimization Tools for FPGAs
Authors: Matthew French, Li Wang and Michael Wirthlin
Organization: USC, BYU

Session 8: Network Technology

Title: Systematic Characterization of Programmable Packet Processing Pipelines
Authors: Michael Attig and Gordon Brebner
Organization: Xilinx Research Lab

Title: Packet-Switched vs. Time-Multiplexed FPGA Overlay Networks
Authors: Nachiket Kapre, Nikil Mehta, Michael deLorimier, Raphael Rubin, Henry Barnor, Michael Wilson, Michael Wrighton and Andre DeHon
Organization: Cal Tech

Session 9: Biomedical and Cryptographic Applications

Title: Single Pass Approximate String Matching on FPGAs
Authors: Martin Herbordt, Tom VanCourt, Yongfeng Gu, Josh Model and Bharat Sukhwani
Organization: Boston University

Title: An FPGA Solution for Radiation Dose Calculation
Authors: Kevin Whitton, X. Sharon Hu and Cedric Yu
Organization: U. of Notre Dame, U. of Maryland Medical School

Title: A Parallel Hardware Architecture for fast Gaussian Elimination over GF(2)
Authors: Andrey Bogdanov, Marius C. Mertens, Christof Paar, Jan Pelzl and Andy Rupp
Organization: Ruhr University

Session 10: Arithmetic

Title: Advanced Components in the Variable Precision Floating-Point Library
Authors: Xiaojun Wang, Sherman Braganza and Miriam Leeser
Organization: Northeastern University

Title: Pipelined Mixed Precision Algorithms on FPGAs for Fast and Accurate PDE Solvers from Low Precision Components
Authors: Robert Strzodka and Dominik Gddeke
Organization: Stanford University